The invention relates to a high-speed logic inverter, having a single power supply source, using a so-called quasi-normally off" low-voltage threshold field-effect transistor. It also relates to multi output logic operators, constructed from this inverter, and providing more or less complex logic functions. It may be produced as integrated circuits.
Conventionally, so-called normally-on field-effect transistors and normally-off transistors are known, the first are cut off by depletion, requiring a double-polarity supply source and having moreover the disadvantage of consuming electric current in the rest state. The second let the current pass when an appropriate voltage is applied to the control gate: they do not require a double-polarity power supply and are more economical but, on the other hand, difficult to produce because of the very small thickness of the conduction channel while giving rise to a large amount of manufacturing waste.
A third category of field-effect transistors, which is intermediate between the two preceding ones while approximating to the second kind, is formed by quasi-normally-off transistors; they are cut off for a threshold voltage V.sub.T which may be positive or negative, which means that a certain spread in the collective manufacture of these transistors may be admitted which is for example the following: EQU -0.4.ltoreq.V.sub.T .ltoreq.0.2 volt
This latter category is easier to manufacture than the second but more difficult to use. It is known, more especially by means of the technique described in French patent document No. 2 449 369 filed on Feb. 13, 1979 by the Applicant, how to produce low-voltage threshold transistors and a logic inverter for use. In this technique, a trench is hollowed out, by ionic erosion, between the source and the drain, which forms a very-low-consumption saturable resistance which may be transformed into a field-effect transistor by depositing a metal layer at the bottom of the trench at the position of the control gate and for fulfilling the function thereof. However, the loads achieved by this technology present a certain spread of the characteristics. Therefore because of this spread, the threshold voltage is sometimes positive, sometimes negative; in the case when it is negative, the input transistor is not cut off, which presents an entrance reduction, prohibiting in particular the formation of multiple inputs.
The construction of multiple-input logic gates, carrying out complex logic functions, and in which the propagation time of the logic signals is no greater than in the basic logic inverter described in the above-mentioned patent application, having a transistor of the "virtually normally off" type, is described in French patent application No. 80 11 550 filed on May 23, 1980 by the Applicant.
Now the structures of these gates correspond to an organization of the purely "convergent" type, i.e. comprising several inputs and a single output.
So as to obtain gates with a single input and several independent outputs (so-called "divergent" logic), capable of being wired up with other gates without troublesome mutual interaction, recourse is had to bipolar transistors of a special technique, for example the so-called "I.sup.2 L" technique. Now, in ultrahigh-speed logic on gallium arsenide, one is obliged to use from a practical point of view the field-effect transistor and, furthermore, of the "quasi-normally off" type, if it is desired to have a single power supply source only.
But the family of logic operators derived from the basic logic inverter, in this technique, is solely convergent, as can be seen in the second above-mentioned patent application. The basic inverter does not lend itself to the formation of operators having several independent outputs.